发明名称 Programmable function block
摘要 A programmable function block comprises a core logic circuit having a first argument input group consisting of first through fourth argument input terminals, a second argument input group consisting of first through fourth argument input terminals, first through third configuration input terminals, a core logic carry output terminal, a core logic carry generation output terminal, a core logic carry propagation output terminal, a ripple-core logic carry input terminal, and a sum output terminal. Connected to interconnection wires and the first and the second argument input groups, an input block includes eighth input selection units for selecting, as eight input selected signals, eight ones of signals on the interconnection wires, a fixed logic value of "1", and a fixed logic value of "0". Connected to the first through the third configuration input terminals, respectively, first through third memory circuits stores, as first through third stored logic values, a logic value of one bit. A carry logic circuit has a ripple carry input terminal, a ripple carry output terminal, a ripple-core logic carry output terminal, a core logic carry generation input terminal, and a core logic carry propagation input terminal.
申请公布号 US6188240(B1) 申请公布日期 2001.02.13
申请号 US19990325339 申请日期 1999.06.04
申请人 NEC CORPORATION;REAL WORLD COMPUTING PARTNERSHIP 发明人 NAKAYA SHOGO
分类号 G06F7/00;G06F7/50;G06F7/503;G06F7/57;G06F7/575;H01L21/82;H03K19/173;H03K19/177;(IPC1-7):H03K19/20 主分类号 G06F7/00
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