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发明名称
Method and apparatus for generating test pattern for circuit blocks
摘要
申请公布号
EP1059584(A3)
申请公布日期
2001.02.07
申请号
EP20000111717
申请日期
2000.05.31
申请人
NEC CORPORATION
发明人
OTSUKA, SHIGEKAZU
分类号
G01R31/28;G01R31/3183;G01R31/3185;G06F11/22;G06F11/263;G11C29/00;H01L21/82;(IPC1-7):G06F11/263;G01R31/318
主分类号
G01R31/28
代理机构
代理人
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地址
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