发明名称 PACKAGE SUBSTRATE
摘要 <p>PROBLEM TO BE SOLVED: To provide a package substrate which allows a high capacitance capacitor to be disposed in the vicinity of an IC chip. SOLUTION: Since a capacitor for power composed of a metallic substrate 12 is disposed immediately under an IC chip 70, a distance between the IC chip and the capacitor becomes short and thereby loop inductance can be reduced. A through hole 268 for connecting to a daughter board 80 is provided on the side of a resin substrate 20 housing the metallic substrate 12. Since signal lines do not pass through a dielectric layer 14, reflection caused by incomplete impedence matching due to a high dielectric and transmission delay due to passing through the high dielectric are prevented.</p>
申请公布号 JP2001024090(A) 申请公布日期 2001.01.26
申请号 JP19990194165 申请日期 1999.07.08
申请人 IBIDEN CO LTD 发明人 NODA KOTA
分类号 H05K3/46;H01L23/12;(IPC1-7):H01L23/12 主分类号 H05K3/46
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