发明名称 METHOD AND APPARATUS FOR POWER AMPLIFICATION
摘要 <p>A power amplifier (101) amplifies a high-frequency signal. A coupler (102) monitors the signal power Pmoni amplified by the amplifier (101). A detector (103) carries out linear half-wave rectification of the input above the forward voltage of a diode, integrates it using an RC filter, and produces a detected voltage Vdet. A gain/offset amplifier (104) amplifies the detected voltage Vdet and/or applies an offset voltage to convert the detected voltage Vdet to a desired voltage, and the resulting voltage serves as the gate voltage of the power amplifier (101). As a result, power consumption in a low-power region of a power amplifier is reduced, and hardware is downsized.</p>
申请公布号 WO2001006665(P1) 申请公布日期 2001.01.25
申请号 JP2000004656 申请日期 2000.07.12
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