发明名称 Method for forming a self aligned contact in a semiconductor device
摘要 A self aligned contact pad in a semiconductor device and a method for forming the self aligned contact pad are disclosed. A bit line contact pad and a storage node contact pad are simultaneously formed by using a photoresist layer pattern having a T-shaped opening including at least two contact regions. An etch stopping layer is formed over a semiconductor substrate and over a transistor. An interlayer dielectric layer is then formed over the etch stopping layer. Next, the interlayer dielectric layer is planarized to have a planar top surface. A mask pattern having a T-shaped opening is then formed over the interlayer dielectric layer, exposing the active region and a portion of the inactive region. The interlayer dielectric layer and etch stopping layer are sequentially etched to reveal a top surface of the semiconductor substrate using the mask pattern, thereby forming a self aligned contact opening exposing a top surface of the semiconductor substrate. The mask pattern is then removed. A conductive layer is formed in the self aligned contact opening and over the interlayer dielectric layer. The conductive layer and the interlayer dielectric layer are planarization-etched to reveal a top surface of the gate mask, thereby forming at least two contact pads.
申请公布号 US6177320(B1) 申请公布日期 2001.01.23
申请号 US19990226961 申请日期 1999.01.08
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO CHANG-HYUN;JEONG HONG-SIK;LEE JAE-GOO;KANG CHANG-JIN;JEONG SANG-SUP;JUNG CHUL;JUNG CHAN-OUK
分类号 H01L21/768;H01L21/311;H01L21/60;H01L21/8242;H01L27/108;(IPC1-7):H01L21/336 主分类号 H01L21/768
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