| 摘要 |
PROBLEM TO BE SOLVED: To suppress a rapid rate of current rise (dI/dt) in a semiconductor device forming a multi-level inverse transform circuit, a sudden rate of change of voltage (dV/dt), and disturbance to a gate circuit, and improve downsizing, economy, and reliability. SOLUTION: This multi-level neutral point potential-fixed power converter is formed so, and the connection of two pairs of capacitors C1, C2 connected in series with each other are a neutral point C, a DC power source V having a positive electrode P and a negative electrode N and a plurality of semiconductor devices US1, US2, US3, US4 are bridge-connected and involves a multi-level inverse transforming circuit inversely converting the DC power source V into AC voltage to supply AC power to a load, wherein saturable reactors LP, LN, LC are connected between the multi-level conversion circuit, the positive electrode P and the negative electrode N of the DC power source V, and the neutral point C respectively. |
