发明名称 ERRONEOUS WRITE PREVENTION SYSTEM FOR NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To prevent the destruction of data due to the erroneously writing or the erroneously erasing of data or the like with respect to a nonvolatile semiconductor memory. SOLUTION: This erroneous write prevention system performs a protection so that the WE(write enable) signal→line (2) (m) of a nonvolatile semiconductor memory 6 is not driven by closing a gate circuit 5 while providing the gate circuit 5 in the WE signal line (1) of the output of a write and erase control circuit 3 with respect to the memory 6 and while outputting the inhit gate signal of a fixed period from a malfunction preventing circuit 4 when a power is supplied and when a failure is generated or the like. Thus, the system prevents the destruction of data due to the erroneously writing and the erroneously erasing of data with respect to the memory 6 by the runaway of a soft program or the like and the occurrence of instable states of elements and the destruction of the elements due to writing operation to blocks in which data are not erased.</p>
申请公布号 JP2001014872(A) 申请公布日期 2001.01.19
申请号 JP19990184391 申请日期 1999.06.29
申请人 NEC COMMUN SYST LTD 发明人 HIRANO NAOKI
分类号 G11C16/02;(IPC1-7):G11C16/02 主分类号 G11C16/02
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