| 摘要 |
PURPOSE: A write driver circuit is provided to reduce a delay time of a write operation by making bank appointment and bank enable operations be carried out in a write driver circuit. CONSTITUTION: A data masking control part(10) generates a bit per mask data for output data(IN) under the control of a load masking register operation signal(lmr), a count signal, a write per bit(WPB) operating signal if outer data(IN) to be written to a memory cell is inputted, and controls yes or no of data masking. The first and second output control parts(21, 22) determine mask on/off states according to the bit per mask data from the data masking control part(10) and make the outer data be passed and cut off, respectively. An output part(30) selectively receives corresponding outer data according to the mask on/off states controlled by the first and second output control parts(21, 22) and outputs the received data to a data input/output line(I/O line).
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