发明名称 DYNAMIC RANDOM ACCESS MEMORY DEVICE PROVIDING REFRESH PERIOD SELECTING CIRCUIT AND INPUT/OUTPUT BIT LINE WIDTH SELECTING CIRCUIT
摘要 PURPOSE: A dynamic random access memory device providing a refresh period selecting circuit is provided to select one among several refresh periods. Also, a dynamic random access memory device providing an input/output bit width selecting circuit is provided to select one among bit widths of a data inputted/outputted to/from a memory device. Also, a dynamic random access memory device is provided to easy change a selected refresh period or an input/output bit width. CONSTITUTION: A dynamic random access memory device includes of a plurality of memory cell arrays(110), a refresh period selecting circuit(150), an address generating circuit, and a row selecting circuit. The plurality of memory cell arrays is arranged by the column and the row. The refresh period selecting circuit responds to a control signal of the outside and generates a refresh period selecting signal. The address generating circuit generates a row address during a refresh period corresponding to the refresh period selecting signal. The row selecting circuit responds to the row address and sequentially selects the rows.
申请公布号 KR20010002766(A) 申请公布日期 2001.01.15
申请号 KR19990022734 申请日期 1999.06.17
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JAE HUN
分类号 G11C11/4076;G06F12/00;G11C11/406;G11C11/407;G11C11/4094;(IPC1-7):G11C11/407 主分类号 G11C11/4076
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