发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To realize fining and reduce the number of masks by providing a peripheral circuit element formed of a small number of p-channel high withstand voltage transistors and a small number of n-channel high withstand voltage transistors on the same semiconductor substrate. SOLUTION: A CMOS transistor consists of a p-channel high withstand voltage transistor Qp and an n-channel high withstand voltage transistor Qn. The transistor Qn is formed of an LOCOS oxide film 11 and a p--type channel stopper region 19 provided to a lower side of the LOCOS oxide film 11 inside an isolation region. That is, a gate electrode 20 is formed on the gate oxide film 14, and in a lower side of the gate oxide film 14, a masked offset type Qn is constituted on the same substrate as Qp by n+-type diffusion layers 22, 22a of a source/drain region provided in connection to an n--type offset region 21.
申请公布号 JP2001007231(A) 申请公布日期 2001.01.12
申请号 JP20000175858 申请日期 2000.06.12
申请人 SEIKO EPSON CORP 发明人 MARUO YUTAKA
分类号 H01L21/8247;H01L21/8238;H01L27/092;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824;H01L21/823 主分类号 H01L21/8247
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