| 摘要 |
CMOS comparators are provided that have substantially improved operating frequency ranges. They include first and second differential pairs of transistors and first, second, third and fourth current mirrors. The first and second differential pairs both respond to an analog input signal but only the first differential pair is coupled to define an output port. The first and second current mirrors are cross coupled to the transistors of the first differential pair but each of the third and fourth current mirrors are cross coupled between a respective transistor of the second differential pair and a respective transistor of the first differential pair. The third and fourth current mirrors provide high-speed discharge paths for parasitic circuit capacitances. The comparator structure can be adjusted to control comparator slew rates and hysteresis.
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