| 摘要 |
A sacrificial, self-aligned polysilicon interconnect structure is formed in a region of insulating material to the side of an active region location and underlying a semiconductor device of a substrate assembly in order to electrically connect the active region and the semiconductor device. A method for making the interconnect structure maintains a preexisting geometry of the active region during etching of an interconnect structure hole in which the interconnect structure is formed and saves process steps. Under the method, a region of insulating material is formed immediately adjacent the active region location. A nitride layer is formed over the active region and protects the active region while an interconnect structure hole is etched partially into the region of insulating material adjacent the active region location with an etching process that is selective to the nitride layer. The interconnect structure hole is filled with polysilicon, the surface of the substrate assembly is planarized, and the nitride layer is removed. The method self-aligns the interconnect structure to the active region location. The nitride layer can be used to protect the active region during sacrificial etching of the interconnect structure during formation of an overlying semiconductor device. A portion of the region of insulating material immediately underlies the interconnect structure to provide over-etch protection. A container capacitor cell is constructed with the method using the interconnect structure as a sacrificial landing pad.
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