| 摘要 |
pulse engineering; control units of vehicle forced idle run economizers. SUBSTANCE: comparator has counter 2 whose clock input is connected to output of pulse generator 1; input signal is applied to clear input of counter 2 through series-connected first and second pulse shapers 9 and 8 and outputs are connected in bit-by-bit manner to first group of inputs of comparison gates 3 and 4 whose second groups of inputs form first and second code buses 12 and 13, respectively. Newly introduced are AND gate 5 whose inputs are connected to outputs of first and second comparison gates 3 and 4; RS flip-flop 6 whose inverted S input is connected to output of second pulse shaper 8 and C input, to output of AND gate 5; D flip-flop 7 whose D input is connected to direct output of RS flip-flop, C input, to output of second pulse shaper 8, inverted output, to disable input of second comparison gate 4, direct output, to output bus 14, R input, to that of RS flip-flop 6 and to initial flip-flop setting bus 14 for power supply. Such circuit arrangement makes it possible to turn on and turn off the output depending on output signal frequency; off-operation occurs at higher frequency of output signal and on-operation, at its lower frequency. EFFECT: provision for change-over frequency hysteresis. 1 dwg
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