发明名称 PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a PLL circuit for easily deciding and changing a circuit constant in a PLL circuit without necessitating any complicate adjusting work. SOLUTION: This PLL circuit 1 is provided with a frequency-divider 12 which frequency-divides an oscillation signal So of a voltage control oscillator 4 and a phase comparator 13 which compares the phase of an inputted reference signal SD1 with the phase of a frequency signal SD2 frequency-divided by the frequency-divider 12, and outputs an error signal Sp corresponding to the phase difference. Oscillation frequencies of the voltage control oscillator 4 are controlled by a control voltage Vc generated, based on the error signal Sp. This PLL circuit 1 is also provided with a digitizing means 14 which digitizes the error signal Sp into error data Dv and controls the voltage generating means 21 and 16 which generate the control voltage Vc, based on the error data Dv.
申请公布号 JP2000353951(A) 申请公布日期 2000.12.19
申请号 JP19990164599 申请日期 1999.06.11
申请人 NAGANO JAPAN RADIO CO 发明人 SHIMOZAKA TETSUYA
分类号 H03L7/06;H03L7/093 主分类号 H03L7/06
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