发明名称 PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device which can cope with frequency change in a wide band and for can output frequencies with a little jitter. SOLUTION: The output of a low pass filter is inputted to a variable resistor 112 for frequency fine adjustment, a variable resistor 113 for frequency band adjustment, a capacitor 114 for frequency band adjustment, and a capacitor 115 for voltage holding. In the asynchronization, a switch 117 is turned on. Output frequencies are changed in a wide frequency band by the variation of the valiable resistances 112 and 13 and the capacitance 114. Afterwards, a switch 117 is turned off in a synchronizing state. Then, an output voltage in the synchronization is preserved in capacitor 115, and the output frequencies are changed in a narrow frequency band by the change on only the variable resistance 112 with the frequencies in the synchronization as a center. Therefore, it is possible to realize the PLL for coping with frequency change in a wide band in the asynchronization and for obtaining output frequencies with a little jitter in the synchronization.
申请公布号 JP2000353952(A) 申请公布日期 2000.12.19
申请号 JP19990163149 申请日期 1999.06.10
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIKAWA MASAKO;NAGATAKIYA KIYOUICHI
分类号 H03L7/099;H03L7/095;H03L7/107 主分类号 H03L7/099
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