发明名称 DECODING DEVICE AND DISPLAY SYSTEM FOR VIDEO SIGNAL
摘要 <p>PROBLEM TO BE SOLVED: To provide the video signal decoding device which enables a high- picture-quality display free of interlacing disturbance on an LCD monitor and the display system which uses the video signal decoding device. SOLUTION: A frame/field process deciding means 302 decides whether data decoded by a variable-length decoding part 301 has frames processed or fields processes by macroblocks. When the data have the fields processed, it is judged that the data is an area having movement in a frame and a field interpolating means 307 generates frame data by interpolation and outputs the data.</p>
申请公布号 JP2000350212(A) 申请公布日期 2000.12.15
申请号 JP19990158566 申请日期 1999.06.04
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YONEYAMA TERU
分类号 H04N19/50;G06T9/00;H04N9/69;H04N19/102;H04N19/132;H04N19/137;H04N19/172;H04N19/186;H04N19/196;H04N19/423;H04N19/44;H04N19/503;H04N19/51;H04N19/513;H04N19/527;H04N19/61;H04N19/625;H04N19/85;H04N19/91;(IPC1-7):H04N7/32 主分类号 H04N19/50
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