发明名称 |
FERROELECTRIC MEMORY DEVICE |
摘要 |
PURPOSE: A ferroelectric memory device is provided to reduce the amount of charges of reference cells and extend the life by alternately storing 0 and 1 into the two reference cells depending on variations in an address signal used to select word lines of a memory cell array. CONSTITUTION: A ferroelectric memory device includes a cell array having a plurality of memory cells between a plurality of word lines and bit lines. A decoder selects the word lines depending on a plurality of address inputs. A logic circuit generates a logic signal depending on two least significant bits of the address. A reference voltage generating circuit(21) has two reference cells(C3,C4) that are alternately programmed by the logic signal. A sense amplifier senses data stored in the memory cell selected by the decoder by means of the output of the reference voltage generating circuit(21).
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申请公布号 |
KR100276569(B1) |
申请公布日期 |
2000.12.15 |
申请号 |
KR19970026328 |
申请日期 |
1997.06.20 |
申请人 |
HYUNDAI ELECTRONICS IND. CO., LTD |
发明人 |
CHOI, JA MOON |
分类号 |
G11C11/22;(IPC1-7):G11C11/22 |
主分类号 |
G11C11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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