发明名称 A CIRCUIT FOR DATA COMPRESSION
摘要 PURPOSE: A signal compression circuit is provided to increase operation range of input voltage in which stable output signal is able to be generated by controlling gain of variable gain end in two levels. CONSTITUTION: A first comparator(41) compares input signal with a first reference voltage(VALC1) already assigned and outputs signal in proportion to the difference. A second comparator(42) compares input signal with a second reference voltage(VALC2) already assigned in a higher level than the level of the first reference voltage(VALC1) and outputs signal in proportion to the difference. A current mirror(43) generates control current in proportion to magnitude of signal output from the first comparator(41) and the second comparator(42). An automatic level control circuit(40) consists of two comparators(41-42) and one current mirror(43).
申请公布号 KR100275937(B1) 申请公布日期 2000.12.15
申请号 KR19970046060 申请日期 1997.09.06
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 KIM, SEONG REOL
分类号 H03M7/30;H03G7/06;H04B1/64;(IPC1-7):H03M7/30 主分类号 H03M7/30
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