发明名称 |
A SIGNAL CLOCK RECOVERY CIRCUIT AND METHOD FOR MULTI-LEVEL MODULATED SIGNALS |
摘要 |
PURPOSE: A symbol clock recovery circuit of a multi-level modulation signal and a method thereof are provided to overcome problems in early-late clock recovery and to simplify hardware by enabling a symbol clock recovery of a multi-level signal. CONSTITUTION: A signal input to a late sampler(11), an early sampler(13) and an on-time sampler(21) are output to a timing error detector(22). The output of the timing error detector(22) is input to a voltage control oscillator(17). The output of the voltage control oscillator(17) is input to an early-late-on-time clock generator(23). The output of the early-late-on-time clock generator(23) is input again to the late sampler(11), the early sampler(13) and the on-time sampler(21).
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申请公布号 |
KR100275919(B1) |
申请公布日期 |
2000.12.15 |
申请号 |
KR19970078945 |
申请日期 |
1997.12.30 |
申请人 |
KOREA ELECTRONICS TECHNOLOGY INSTITUTE |
发明人 |
DHONG, YONG BAE;KIM, JE WOO;CHOI, BYOUNG HO;PAIK, JONG HO |
分类号 |
H04L7/00;(IPC1-7):H04L7/00 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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