| 摘要 |
The invention relates to a flip-flop circuit which comprises a master latch circuit (2) that receives an input signal (D), and which comprises a slave latch circuit (3) connected in series thereto, whereby both latch circuits (2, 3) are clocked in a manner that is complementary to one another. The output signal value (Q,<o>Q</o>) of the flip-flop circuit is not directly output on the output of the slave latch circuit (3), but is output via a non-differential output driver circuit (4), e.g. an inverter circuit. |
