| 摘要 |
<p>The present invention is a method for fabricating a gate of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) with the gate having low resistivity. The MOSFET has a drain region, a source region, and a channel region fabricated within a semiconductor substrate, and the MOSFET initially has a gate comprised of a first metal silicide on polysilicon disposed on a gate dielectric over the channel region. Generally, the method of the present invention includes a step of depositing a first dielectric layer over the drain region, the source region, and the gate of the MOSFET. The present invention also includes steps of polishing down the first dielectric layer over the drain region and the source region, and of polishing down the first dielectric layer over the gate until the first metal silicide or the polysilicon of the gate is exposed. The present invention further includes the step of depositing a metal over the first metal silicide if the first metal silicide is exposed or over the polysilicon if the polysilicon is exposed, and of performing a silicidation anneal to form a second metal silicide over a remaining portion of the polysilicon. The thickness of the second metal silicide is greater than the thickness of the first metal silicide. In this manner, the gate of the present invention has low resistivity since a relatively thick layer of metal silicide is formed on the remaining portion of the polysilicon. In addition, with the present invention, the remaining portion of the polysilicon has a sufficient thickness such that a threshold voltage of the MOSFET is not substantially affected by the second metal silicide disposed on top of the remaining portion of the polysilicon.</p> |
