| 摘要 |
PROBLEM TO BE SOLVED: To provide a receiver that can surely diagnose at high-speed whether each of its section is normal. SOLUTION: A control section 19 sets a reception frequency of a tuner 2 and diagnoses whether a PLL circuit 20 is normal or abnormal on the basis of a result of detection by a PLL synchronization detector 3. When the PLL circuit 20 is normal, the control section 19 diagnoses whether or not a QPSK demodulator 21 is normal, on the basis of the detection result of a QPSK synchronization detector 22. When the QPSK demodulator 21 is normal, whether the frame synchronization processing of a CH decoder 24 is normal is discriminated, on the basis of the detection result of a frame synchronization detector 25. When the frame synchronization of the CH decoder 24 is diagnosed normal, whether the channel synchronization processing of the CH decoder 24 is normal is diagnosed, on the basis of the detection result of a CH synchronization detector 26. A display device 18 informs the inspector of the result of diagnosis, when abnormity of the PLL circuit 20 is diagnosed as being abnormal by the control section 19, the QPSK demodulator 21 or the CH decoder 24. |
