发明名称 SIGNAL-GENERATING CIRCUIT FOR SEMICONDUCTOR TESTING DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a signal generating circuit of a semiconductor testing device that is capable of reducing the data transmission amount for skew correction when an operation mode is switched, and to allow concurrent use of respective format channels without reducing the number of effective channels. SOLUTION: A signal is generated, to be output, by format channels 1, 2 based on waveform information assigned by a program. Skew correcting circuit 51-54 are provided corresponding to the format channels 1, 2, and a signal skew output from the other format channel is corrected using as reference a signal output from the corresponding format channel. Logical sum circuits 61-64 are provided corresponding to the skew correcting circuits 51-54, and a signal from the corresponding skew correcting circuit and a signal from the format channel made to correspond to the skew correcting circuit are synthesized.
申请公布号 JP2000338194(A) 申请公布日期 2000.12.08
申请号 JP19990153075 申请日期 1999.05.31
申请人 ANDO ELECTRIC CO LTD 发明人 ITO KIYOSHI
分类号 G01R31/28;G01R31/3183;G01R31/319;G01R31/3193;(IPC1-7):G01R31/28;G01R31/318 主分类号 G01R31/28
代理机构 代理人
主权项
地址