| 摘要 |
Exemplary embodiments of the present invention teach a structure and process for forming an array of storage capacitors for a memory array in a memory semiconductor device. The process comprises the steps of: forming a first set of individual storage node plates for a first set of storage capacitors; forming storage node pillars that alternate in position with the individual storage node plates of the first set of individual storage node plates, the storage node pillars being approximately equal in height to neighboring storage node plates; forming a second set of individual storage node plates for a second set of storage capacitors, each individual storage node plate of the second set physically connecting to an individual storage node pillar; forming a cell dielectric material on the first and second sets of individual storage node plates; and forming a second capacitor plate over the first and second sets of individual storage node plates. The resulting structure comprises: conductive word lines running in a generally parallel direction to one another; a first set of individual storage node plates for a first set of storage capacitors; storage node pillars that alternate in position with individual storage node plates of the first set of individual storage node plates, the storage node pillars being approximately equal in height to neighboring storage node plates; a second set of individual storage node plates for a second set of storage capacitors, each individual storage node plate of the second set physically connecting to an individual storage node pillar; a cell dielectric material on the first and second sets of individual storage node plates; and a second capacitor plate over the first and second sets of individual storage node plates.
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