发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 A phase locked loop circuit includes a phase comparator, a temperature information output section, an arithmetic processing circuit, and a voltage controlled oscillator. The phase comparator compares the phase of an input signal with that of a frequency division signal obtained by frequency-dividing an output frequency signal. The frequency division signal has the same frequency as that of the input signal. The temperature information output section outputs temperature information based on an ambient temperature. The arithmetic processing circuit performs arithmetic processing by using the temperature information from the temperature information output section and an output from the phase comparator, and outputs the arithmetic processing result as a voltage control signal. The voltage controlled oscillator outputs an output frequency signal in accordance with the voltage control signal from the arithmetic processing section.
申请公布号 CA2230162(C) 申请公布日期 2000.11.28
申请号 CA19982230162 申请日期 1998.02.23
申请人 NEC CORPORATION 发明人 KOBAYASHI, TOSHIAKI
分类号 H03L7/093;H03L7/099;(IPC1-7):H03L7/099 主分类号 H03L7/093
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