发明名称 Charge pump for electrical phase-locked loop (PLL)
摘要 A charge pump circuit provides no net charge transfer during the anti-backlash pulse to the loop-filter (LF). The circuit has phase-locked loop (PLL) latched in, and the source- and sink-current contributions held equal. The voltage-controlled oscillator (VCO) remains tuned and balanced with the desired control voltage precisely adjusted. The PMOS-transistor (Csource) forming the boost capacitance in the source branch, has its gate-terminal joined to the gate terminal of the PMOS- output transistor (MP1) of the charge pump (CP). The NMOS-transistor (Csink) forming the boost-capacitance in the sink branch has its gate-terminal joined to the gate terminal of the NMOS-output transistor (MN1) of the charge pump. The length and width of the PMOS-transistor (Csource) and of the NMOS- transistor (Csink) are fixed at the same length and up to half the width of the corresponding PMOS- or NMOS- output transistor (MP1,MN1) of the charge pump.
申请公布号 DE19909755(C1) 申请公布日期 2000.11.16
申请号 DE19991009755 申请日期 1999.03.05
申请人 SIEMENS AG 发明人 GOSMANN, TIMO
分类号 H03L7/089;H03L7/18;(IPC1-7):H03L7/089 主分类号 H03L7/089
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