| 摘要 |
PURPOSE: A graphic processor is provided to connect an external memory with a Que memory, variably regulate a FIFO size of a system memory according to a graphic data quantity, reduce overall chip size, and enhance a performance. CONSTITUTION: A main memory stores a program and work data. CPU processes a data according to a program of a main memory, and outputs a high-level graphic instruction data. A general graphic processor converts a high-level graphic instruction data to a low-level graphic instruction data. Que memory stores the low-level graphic instruction data in order. A primitive graphic processor reads a low-level graphic instruction data from the Que memory, and converts it to a pixel data. Image buffer receives a pixel data of the primitive graphic processor, and buffers it. A video signal generator receives a buffered data from the image buffer, and outputs a video signal according to the buffered data. The FIFO of Que memory is connected to FIFO of a main memory, and low level graphic instruction data generated from the general graphic processor is sequentially stored in the FIFO area of the Que memory and the main memory.
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