发明名称 CHIP SCALE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
摘要 PURPOSE: A chip scale package and a method for manufacturing the same are provided to perform a packaging process under a wafer level status by using a ceramic substrate instead of a pattern film. CONSTITUTION: A chip scale package and a method for manufacturing the same comprise a semiconductor chip(20), a substrate(30), a metal wire(70), a packing material(50), and a solder ball(60). The semiconductor chip comprises a bonding pad(21). The substrate is formed with a ceramic instead of a pattern film and it comprises a metal pattern(34). The metal wire connects electrically the metal pattern with the bonding pad. The packing material is charged into an opening portion of the substrate. The solder ball is formed on a ball land of the substrate.
申请公布号 KR20000066097(A) 申请公布日期 2000.11.15
申请号 KR19990012947 申请日期 1999.04.13
申请人 HYUNDAI ELECTRONICS IND. CO.,LTD 发明人 KIM, JAE MYEON
分类号 H01L23/28;H01L21/56;H01L23/12;H01L23/14;H01L23/50;(IPC1-7):H01L23/50 主分类号 H01L23/28
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