发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To prevent the increase of manufacturing processes by providing a control gate consisting of impurity layers and a floating gate consisting of conduction layers and overlapping through insulators in a programmable memory cell storing data for relieving a defective memory cell. SOLUTION: In order to store a relief address, an address signal formed by an address buffer circuit is converted to write-in data by a relief address selecting circuit and stored in a non-volatile memory element QE arranged in the relief address storing circuit. In the non-volatile memory element QE, a control gate is constituted of diffusion layers 6, 10, a conduction layers (floating gates) 8, gate insulation films 7 between the control gate and conduction layers 8, and a source and a drain are constituted of an N type diffusion layers 10. The conduction layers 8 uses poly-silicon and is formed simultaneously with the conduction layers 8 used as the gate electrodes of N channel MOSFETQN and P channel MOSFETQP.
申请公布号 JP2000315395(A) 申请公布日期 2000.11.14
申请号 JP20000102931 申请日期 2000.04.05
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 KURODA KENICHI;TAKEDA TOSHIFUMI;MORIUCHI HISAHIRO;SHIRAI MASAKI;SAKAGUCHI JIRO;MATSUO AKINORI;YOSHIDA SEIJI
分类号 G11C17/00;G11C16/06;G11C29/00;G11C29/04;H01L21/8242;H01L21/8246;H01L21/8247;H01L27/10;H01L27/108;H01L27/112;H01L27/115 主分类号 G11C17/00
代理机构 代理人
主权项
地址