发明名称 TIMER CIRCUIT AND METHOD FOR INFORMING OF TIME-OUT
摘要 <p>PROBLEM TO BE SOLVED: To provide a timer circuit capable of setting up a timer value for a long period and setting up timer values for plural periods and to provide its time-out informing method. SOLUTION: A hardware timer 3 recurrently executes counting operation by counting clocks 101 inputted from a clock generation circuit CG1 and outputs a hardware timer counting value 105, a hardware timer counting value updating signal 104 and an RCO signal 111 to a subtraction period changing circuit 9. The circuit 9 masks the counting value 105 and the updating signal 104 on the basis of the RCO signal 111 outputted from the timer 3 and a subtraction period masking range set up from a program. A subtraction circuit 4 executes subtraction processing for software timer counting values stored in a timer register group 6 on the basis of the counting value 105 and the updating signal 104 inputted from the circuit 9.</p>
申请公布号 JP2000315122(A) 申请公布日期 2000.11.14
申请号 JP19990125598 申请日期 1999.05.06
申请人 NEC ENG LTD 发明人 SAKAKIBARA OSAMU
分类号 G06F9/30;G06F1/14;(IPC1-7):G06F1/14 主分类号 G06F9/30
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