| 摘要 |
PROBLEM TO BE SOLVED: To write data normally into a memory by inputting an internal clock signal, a write signal and a test-mode entry signal and delaying an output signal. SOLUTION: As initial conditions, an internal clock signal OPCK is set at a potential L, a test-mode entry signal TMBI is set at a potential H, a write signal WRITE is set at the potential H, a signal FA which is output from an inverter 153F and which is input to a NAND element 153A is set at the potential H, a signal EB which is output from a NAND element 153E and which is input to a NAND element 153B is set at the potential H, a signal which is input to a first delay circuit 150 is designated as a delay input signal (1), an initial state is set at the potential L, a signal which is input to a second delay circuit 154 is designated as a delay input signal (2), and the initial state is set at the potential L. The initial state of a signal BNKWRT is set at the potential L. Then, a signal OPCK is set at the potential H, the signal WRITE is set at the potential H, and the signal FA is set at the potential H as the initial state. Then, the initial signal of the first delay circuit 150 is changed from the potential L in the write state to the potential H.
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