Reversible adiabatic logical circuit for implementing logical forward function has compensation reduction in the oscillation to be attributed to a threshold voltage value

摘要

Logical inverse function and its complementary logical functions by use of only NMOS transistors in a forward function logical circuit (31) or an inverse function logical circuit (33) and for the compensation a reduction in the oscillation to be attributed to a threshold voltage value during the operation of the NMOS transistors by using one of the few PMOS transistors. The forward function logical (31) is controlled with a work cycle from power supply clocks with at least eight phases during a time cycles the circuit also has a clamping circuit (37) which includes two transistors which are switched between the output node and an assigned complementary output node in succession. The inverse function logical circuit (33) is controlled by a second work cycle running after the first work cycle and has about two phases, and a compensation circuit (35) which compensates for the reduction in the oscillation of the output node as a result of the threshold voltage value of the NMOS transistors in the forward and inverse function logical circuits. All three circuits have a complementary binary rail using one or more NMOS transistors for determining the discharge path of the output node.