发明名称 |
DMA CONTROL SIGNAL GENERATING CIRCUITS |
摘要 |
PURPOSE: A circuit for generating a control signal of a direct memory access is provided to decrease a chip size and a cost by discriminating a parameter register setup and an operation of the direct memory access through only one flip-flop. CONSTITUTION: A D flip-flop(30) receives a reset signal(RESET) of an one-chip controller as a clear signal, and outputs a non-inversion value by receiving a chip selection signal(PCS) as a clock input. An inverter(31) inverts an output(Q) of the D flip-flop(30). An NAND gate(32) outputs a result of a logic operation to an DMA(Direct Memory Access) control signal terminal(DACK) by receiving an output of the inverter(31) and a data request signal(DRQ). An inverter(33) outputs a result of the inversion to a chip selection terminal(CS) by inverting an output of the NAND gate(32).
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申请公布号 |
KR100267783(B1) |
申请公布日期 |
2000.11.01 |
申请号 |
KR19970007989 |
申请日期 |
1997.03.10 |
申请人 |
HYUNDAI MICRO ELECTRONICS CO., LTD. |
发明人 |
PARK, SANG GEUN |
分类号 |
G06F15/78;(IPC1-7):G06F15/78 |
主分类号 |
G06F15/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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