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经营范围
发明名称
Bit interleave circuit and bit deinterleave circuit
摘要
申请公布号
EP1030454(A3)
申请公布日期
2000.10.25
申请号
EP20000100163
申请日期
2000.01.11
申请人
FUJITSU LIMITED
发明人
YAMASHITA, ATSUSHI
分类号
H03M13/27;(IPC1-7):H03M13/27
主分类号
H03M13/27
代理机构
代理人
主权项
地址
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