| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device where a logic circuit and a storage circuit coexist, wherein in a power-on sequence, a gate control or internal node initialization is performed at a prestage of the storage circuit to prevent entrance of uncertain signal into the storage circuit. SOLUTION: A logic coexisting DRAM/LSI comprises a logic region 1, containing a logic circuit and a DRAM macro region 2 containing DRAM. The DRAM macro region 2 comprises an input latch circuit 21, which latches the output signal from an output latch circuit 12 of the logic region 1, a gate control circuit 22 comprising 2-input NOR gate, where that output signal is logically calculated with a reset signal for gate control, and then the output signal of fixed level is outputted, and a DRAM logic 23 which is controlled by a memory signal comprising the output signal, etc., and the input signal which is inputted in the DRAM logic 23 is set to a fixed level by the gate control circuit 22 during a power-source voltage step-up period at power on.
|
