发明名称 |
VIDEO DECODING AND DISPLAY TIMING CONTROL METHOD AND APPARATUS THEREFOR |
摘要 |
PURPOSE: A method and an apparatus for controlling video decoding and output timing are provided to control decoding and outputting timing of continuous B pictures by using one frame as a memory size for decoding and outputting the B picture. CONSTITUTION: A B picture included in an input video bit stream is decoded on the basis of previous I(Intra-coded) and P(predictive-coded) pictures and the next I and P pictures. The decoded B picture data of one frame are stored on a memory(120). A decoding controller(130) controls a decoding operation for the B picture by comparing a decoding process with an outputting process when the decoded B picture data of one frame are outputted from the memory(120). |
申请公布号 |
KR100269111(B1) |
申请公布日期 |
2000.10.16 |
申请号 |
KR19970028146 |
申请日期 |
1997.06.27 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
YU, PIL HO |
分类号 |
H04N7/24;G06T9/00;H04N7/26;H04N7/50;(IPC1-7):H04N7/24 |
主分类号 |
H04N7/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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