发明名称 |
A MEMORY ADDRESS TRANSLATION SYSTEM AND METHOD FOR A MEMORY HAVING MULTIPLE STORAGE UNITS |
摘要 |
A memory address translation system and method for use in a computer system having one or more processors coupled to supply (i.e., issue) addresses to a main memory, wherein the main memory includes multiple Memory Storage Units (MSUs), and wherein the multiple MSUs are divided into multiple groups of MSUs. An address issued by a processor is first mapped to a selected one of the multiple groups of MSUs according to a first mapping function, and then the address is further mapped to a selected one of the MSUs that is included in the selected group.
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申请公布号 |
WO0036513(A3) |
申请公布日期 |
2000.10.12 |
申请号 |
WO1999US30436 |
申请日期 |
1999.12.17 |
申请人 |
UNISYS CORPORATION |
发明人 |
GULICK, ROBERT, C.;MORRISSEY, DOUGLAS, E. |
分类号 |
G06F12/02;G06F12/06;(IPC1-7):G06F12/02 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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地址 |
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