发明名称 |
Semiconductor memory component with numerous word lines and individual or paired bit lines and two types of earth voltage lines |
摘要 |
The component comprises numerous word lines (WL1---m), individual or paired bit lines (BL1---BLnB), first earth voltage lines (VSS) arranged in the direction parallel to the bit lines, and numerous memory cells (MC11---mn), each between a word and bit line. There are numerous second earth voltage lines arranged in a direction parallel to the word lines. Numerous feed voltage lines (VCC) extending in a direction parallel to the bit lines. An independent claim is included for the component mfr.
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申请公布号 |
DE10014195(A1) |
申请公布日期 |
2000.10.05 |
申请号 |
DE20001014195 |
申请日期 |
2000.03.22 |
申请人 |
SAMSUNG ELECTRONICS CO. LTD., SUWON |
发明人 |
KIM, DU-EUNG;CHOI, BYUNG-GIL;HAN, SANG-JIB;KWAK, CHOONG-KEUN;JUNG, SOON-MOON;KIM, SUNG-BONG |
分类号 |
H01L27/11;G11C5/06;G11C11/40;G11C11/412;H01L21/8244;(IPC1-7):G11C7/00;G11C11/419 |
主分类号 |
H01L27/11 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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