发明名称 Structures of a low-voltage-operative non-volatile ferroelectric memory device with floating gate
摘要 A non-volatile ferroelectric memory device has been developed, in which the lead titanate (PbTiO3) thin film is deposited on a n/P+ Si substrate by rf magnetron sputtering as the gate oxide and Pt is embedded in the gate oxide as the floating gate. Additionally, associated with the rapid bulk channel structure with higher mobility, the developed memory device has the following features: (1) low write/erase voltage (</=10 V); (2) fast access time (<160 ns); (3) easy to fabricate on VLSI memory device.
申请公布号 US6128211(A) 申请公布日期 2000.10.03
申请号 US19970965406 申请日期 1997.11.06
申请人 NATIONAL SCIENCE COUNCIL 发明人 FANG, YEAN-KUEN;CHEN, FU-YUAN;CHEN, JIANN-RUEY
分类号 G11C11/22;(IPC1-7):G11C11/22 主分类号 G11C11/22
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