发明名称 Apparatus and method for a base address register on a computer peripheral device supporting configuration and testing of address space size
摘要 A method for providing a base address register in a computer system that allows the length of the base address portion of an address to be changed and thereby allows various sizes of address spaces to be supported by the same base address register. The method employs steps that enable and disable bits of the base address register to properly support the desired address space size. Some embodiments of the method set disabled bits of the base address register to a known value. An apparatus that employs the method includes a second register connected to the base address register to supply signals that enable and disable bits of the base address register appropriately.
申请公布号 US6128718(A) 申请公布日期 2000.10.03
申请号 US19970919376 申请日期 1997.08.28
申请人 INTEL CORPORATION 发明人 SCHMISSEUR, MARK A.;DAVIS, BARRY
分类号 G06F9/30;G06F9/355;(IPC1-7):G06F9/35;G06F12/10 主分类号 G06F9/30
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