发明名称 |
SEMICONDUCTOR MEMORY |
摘要 |
<p>PROBLEM TO BE SOLVED: To obtain a semiconductor memory in which a current caused by a process defect can be reduced and the power consumption at the time of a self-refresh can be reduced. SOLUTION: A DRAM 31 is provided with plural cell blocks BLK0-BLK3, and block control circuits 33a-33d supplying pre-charge signals PR0-PR3 pre- charging bit lines of each cell blocks BLK0-BLK3. Each block control circuit 33a-33d controls levels of the pre-charge signal PR0-PR3 to a reset level of a word line in accordance with an access state of each cell block BLK0-BLK3.</p> |
申请公布号 |
JP2000268571(A) |
申请公布日期 |
2000.09.29 |
申请号 |
JP19990075242 |
申请日期 |
1999.03.19 |
申请人 |
FUJITSU LTD;FUJITSU VLSI LTD |
发明人 |
SATO HAJIME;KAWAMOTO SATORU |
分类号 |
G11C7/12;G11C11/401;G11C11/403;G11C11/406;G11C11/409;H01L27/10;(IPC1-7):G11C11/409 |
主分类号 |
G11C7/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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