发明名称 INSPECTION METHOD OF SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To enable adequately estimating an N-type TFT(thin film transistor) and a P-type TFT which constitute a CMOS inverter circuit on a substrate, without taking time and labor. SOLUTION: In an active matrix substrate 200, a signal for inspection is inputted to a CMOS inverter circuit 61 which is to be an inspection object from an input terminal 546 while the electric potential is changed, and the potential change of a signal Vout outputted from an output terminal 547 is detected. Symmetric property of the potential change of the output signal Vout from the CMOS inverter circuit 61 in the region (vicinity of inverted potential) where an N-type TFT 10 and a P-type TFT 20 of the CMOS inverter circuit 61 turn on and off is obtained.</p>
申请公布号 JP2000269507(A) 申请公布日期 2000.09.29
申请号 JP19990074002 申请日期 1999.03.18
申请人 SEIKO EPSON CORP 发明人 ITO TOMOYUKI;EGUCHI TSUKASA;FUJITA SHIN
分类号 H01L29/786;G01R31/00;G02F1/136;G02F1/1368;(IPC1-7):H01L29/786 主分类号 H01L29/786
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