DEFECTIVE PATTERN ANALYZING METHOD FOR SEMICONDUCTOR STORAGE DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a defective pattern analyzing method for a semiconductor storage device by recognizing even a defect present at the end of a defective address space on one decision criteria without a plurality of branched conditions, for simplified recognition process. SOLUTION: This is related to a semiconductor storage device evaluating device wherein a defective address of a semiconductor device is detected, from which a form of specific defective pattern is recognized. A virtual address space 10 is provided which contains an actual defective address space 9 and comprises at least one line of address outside the actual defective address space 9. The defect at the end of the virtual address space 10 is zero. Further, a virtual defect is caused at the end of the virtual address space 10 according to the information of the actual defect address space 9.