发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To restrain influence of a deteriorated signal waveform to minimum and enable stable operation at high speed, by assigning an external connecting terminal for a reference clock signal having the shortest signal rise time and signal fall time to an external connecting terminal which is nearest to the outer periphery of a package. SOLUTION: In order to reduce deterioration of a signal to minimum, the rise time and the fall time of a reference clock signal CLK are made shorter than those of a data signal DATA synchronous with the reference clock signal CLK, so that a signal wiring transmitting the reference clock signal CLK whose signal deterioration is smallest is assigned to a wiring 151 having the shortest plated wiring stub 161. A signal wiring transmitting the data signal DATA whose rise time or fall time is longer than that of the reference clock CLK is assigned to a wiring 152 having a plated wiring stub 162, whose length is greater than or equal to that of the plated wiring stub 161.
申请公布号 JP2000269379(A) 申请公布日期 2000.09.29
申请号 JP19990073158 申请日期 1999.03.18
申请人 HITACHI LTD 发明人 NAKANO TAKESHI;NAGATA TATSUYA;SHIRAI MASAYUKI;HIDA AKIHIRO
分类号 H01L23/12;(IPC1-7):H01L23/12 主分类号 H01L23/12
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