| 摘要 |
PROBLEM TO BE SOLVED: To obtain an interrupt control circuit which allows a host to surely detect simultaneously generated interrupt requests. SOLUTION: This circuit is provided with an up/down counter 1. When an interrupt request is generated, the counter 1 of a corresponding bit of an interrupt control register 2 is increased, and when a host resets the register 2, the counter 1 is decremented. Even though interrupt requests are continuously generated at the same time, the host can surely detect them because interrupt generation is stored as a count value of the counter 1.
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