| 摘要 |
According to one embodiment, a word line control circuit (100) includes certain sub-array word lines (SWL-00 to SWL-03) coupled to one bank (BANK0)of memory cells and other sub-array word lines (SWL-10 to SWL-13) coupled to another bank (BANK1) of memory cells. Complementary main word lines (MWL and /MWL) are provided that can select groups of sub-array word lines in both banks when activated. Latch circuits (104-A0 to 104-B1) are provided for latching main word lines values. Such an arrangement allows a complementary main word line values to be latched for a first bank (BANK0), thereby selecting a group of sub-array word lines (SWL-00 to SWL-03) in the first bank (BANK0). The complementary main word line (MWL and /MWL) can then be activated again. The second complementary main word line values can then latched for a second bank (BANK1), thereby selecting a group of sub-array word lines (SWL-10 to SWL-13) in the second bank (BANK0). Such an arrangement allows a main word line to be common to both banks, while still allowing individual selection of different sub-array word lines in different banks.
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