| 摘要 |
An analog-to-digital converting including a resistor network for producing a group of coarse differential reference voltages and a group of fine differential reference voltages, a bank of coarse comparators receiving the coarse differential reference voltage and a bipolar differential input voltage. A bank of fine comparators receives selected ones of the group of fine differential reference voltages, based upon the output of the coarse comparators during a previous clock interval, and a unipolar differential input voltage derived from the bipolar input. Encoder circuitry converts the output of the coarse and fine comparator banks to a digital output.
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