| 摘要 |
PURPOSE: A viterbi decoder is provided to allow the input memory unit to share the functions of the output memory unit by eliminating the output memory unit from the trace-back and output unit and adding a multiplexer to the input/output terminal of the input memory unit. CONSTITUTION: The decoder includes an input memory unit(41), a first multiplexer(42), a branch matric calculation unit(43), a first and second adder units(21,22), a comparator(23), a selection unit(25), a state memory unit(24), a trace-back unit(50), a second multiplexer(51). Here, the first multiplexer(42) receives data from the input memory unit(41) and selectively sends the data to the external device or to the branch matric calculation unit(43) responding to the data selection signal. The second multiplexer(51) selects between the feedback data from the trviterbiace-back unit(50) and the de-interleaved data responding to the data selection signal and sends the selected data to the input memory unit(41).
|
