DEAD-TIME GENERATING CIRCUIT AND ERROR OPERATION DIAGNOSING CIRCUIT OF SWITCHING ACTION IN AN INVERTER OR CONVERTER

摘要

PURPOSE: A dead time generating circuit and a wrong operation testing circuit are provided to generate a dead time which switching elements are in a turn off state when on/off operation between switching elements of each phase in an inverter and a converter and test a wrong operation. CONSTITUTION: A counter(10) counts a reference clock signal. An AND gate(11) decodes an output of the counter(10) and outputs a trigger signal for setting a dead time period. A flip-flop(12) delays an input switching control signal by a dead time period. An AND gate(13) and a NOR gate(14) ANDs and NORs an output signal of the flip-flop(12) and a switching control signal and outputs upper and lower switching element control signals. AND gates(15,16) AND outputs of the AND gate(13) and a NOR gate(14) and a driving signal and output a gate control signal to upper and lower switching elements. An XOR gate(17) XORs and outputs the output signal of the flip-flop(12) and a switching control signal to a clear terminal of the counter(10).