| 摘要 |
PROBLEM TO BE SOLVED: To prevent overflow of an STD-buffer and destruction of a synchronizing word or the like when an error detection signal is shorter than a sequence error code. SOLUTION: An error signal detection circuit 105 detects an OR of error detection signals of three coded data with delays of 3, 4 and 5 clocks by a shift register 104 at a detection position of a synchronizing word obtained from a synchronizing word detection means 103. When the error detection circuit 105 detects an active error detection signal, the error detection circuit 105 activates the error detection signal for a bit length of a sequence error code from the detected position of the synchronizing word. Then a sequence error code generating circuit 106 generates the sequence error code from the synchronizing word detection position and replaces a coded data with this sequence error code. |
